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Folded Fat H-Tree: An Interconnection Topology for Dynamically Reconfigurable Processor Array.

Yutaka YamadaHideharu AmanoMichihiro KoibuchiAkiya JourakuKenichiro AnjoKatsunobu Nishimura
Published in: EUC (2004)
Keyphrases
  • processor array
  • parallel implementation
  • parallel algorithm
  • tree structure
  • mesh connected
  • knowledge base
  • parallel computers
  • databases
  • detection method