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Folded Fat H-Tree: An Interconnection Topology for Dynamically Reconfigurable Processor Array.
Yutaka Yamada
Hideharu Amano
Michihiro Koibuchi
Akiya Jouraku
Kenichiro Anjo
Katsunobu Nishimura
Published in:
EUC (2004)
Keyphrases
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processor array
parallel implementation
parallel algorithm
tree structure
mesh connected
knowledge base
parallel computers
databases
detection method