Design flow for optimizing performance in processor systems with on-chip coarse-grain reconfigurable logic.
Michalis D. GalanisGrigoris DimitroulakosConstantinos E. GoutisPublished in: IPDPS (2006)
Keyphrases
- coarse grain
- chip design
- fine grain
- single chip
- low cost
- reconfigurable hardware
- high speed
- functional verification
- micron cmos
- multithreading
- ibm power processor
- digital circuits
- design process
- evolutionary algorithm
- physical design
- distributed memory
- design methodology
- instruction set
- circuit design
- ibm zenterprise
- computer systems
- application specific integrated circuits
- general purpose