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A full chip integrated power and substrate noise analysis framework for mixed-signal SoC design.
Daisuke Kosaka
Yoji Bando
Goichi Yokomizo
Kunihiko Tsuboi
Ying Shiun Li
Shen Lin
Makoto Nagata
Published in:
CICC (2009)
Keyphrases
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mixed signal
low power
power consumption
ibm power processor
vlsi circuits
design process
multi channel
chip design
high speed
circuit design
single chip
functional verification
cmos technology
power management
power dissipation
image processing
user interface