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A Tutorial on Systematic Design of CMOS A/D Converters: Illustrated by a 10 b, 500 MS/s SAR ADC with 2 GHz RBW.
Tetsuya Iizuka
Hao Xu
Asad A. Abidi
Published in:
ESSCIRC (2021)
Keyphrases
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high speed
circuit design
analog to digital converter
case study
design process
real time
user interface
single chip