Thermally-induced soft errors in nanoscale CMOS circuits.

Hua Li Joseph L. Mundy William R. Patterson Dimitrios Kazazis Alexander Zaslavsky R. Iris Bahar

Published in: NANOARCH (2007)

Keyphrases

analog vlsi
delay insensitive
high speed
circuit design
vlsi circuits
focal plane

cmos technology
infrared
floating gate
power dissipation
chip design
asynchronous circuits

random access memory
low voltage
analog circuits
error accumulation
low power

power consumption
errors occur
neural network
logic synthesis
low cost