An integrated machine code monitor for a RISC-V processor on an FPGA.
Hiroaki KanekoAkinori KanasugiPublished in: Artif. Life Robotics (2020)
Keyphrases
- instruction set
- low power consumption
- single chip
- high speed
- hardware architecture
- real time
- xilinx virtex
- low cost
- gate array
- digital signal
- systolic array
- instruction set architecture
- low power
- dedicated hardware
- industry standard
- parallel architecture
- application specific
- source code
- processor core
- field programmable gate array
- parallel processing
- data flow
- hardware implementation
- processing elements
- computation intensive
- monitoring system
- level parallelism
- error detection
- floating point
- computer architecture
- data acquisition
- fpga device
- signal processing
- power consumption
- batch processing
- central processing unit
- connected component labeling
- fpga implementation
- hardware architectures
- general purpose processors
- connected components