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19.7 A 65nm CMOS ADPLL with 360µW 1.6ps-INL SS-ADC-based period-detection-free TDC.

Akihide SaiSatoshi KondoTuan Thanh TaHidenori OkuniMasanori FurutaTetsuro Itakura
Published in: ISSCC (2016)
Keyphrases
  • user friendly
  • detection algorithm
  • detection rate
  • detection method
  • automatic detection
  • false positives
  • high speed
  • power consumption
  • low cost
  • low power
  • silicon on insulator
  • wireless sensor networks
  • power supply