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A 1-GHz, 56.3-dB SFDR CMOS track-and-hold circuit with body-bias control circuit.
Kenichi Ohhata
Kosuke Yayama
Yuichiro Shimizu
Kiichi Yamashita
Published in:
IEICE Electron. Express (2007)
Keyphrases
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high speed
circuit design
analog vlsi
delay insensitive
dc dc converter
electronic circuits
low voltage
vlsi circuits
low power
cmos technology
power supply
low cost
control system
power dissipation
control method
human body
digital circuits
database
logic circuits
control algorithm
real time