Performance investigation of different low power SRAM cell topologies using stacked-channel tri-gate junctionless FinFET.
Devender Pal SinghShalini ChaudharyBasudha DewanMenka YadavPublished in: Microelectron. J. (2024)
Keyphrases
- low power
- cmos technology
- power consumption
- wireless transmission
- low cost
- high speed
- nm technology
- field effect transistors
- single chip
- digital signal processing
- high power
- low voltage
- multi channel
- power reduction
- logic circuits
- low power consumption
- vlsi circuits
- power saving
- mixed signal
- image sensor
- vlsi architecture
- leakage current
- high density
- channel capacity
- error correction