On the Reliability of FeFET On-Chip Memory.
Paul R. GensslerVictor M. van SantenJörg HenkelHussam AmrouchPublished in: IEEE Trans. Computers (2022)
Keyphrases
- low cost
- memory subsystem
- random access memory
- digital signal processors
- high speed
- memory space
- memory usage
- reliability analysis
- multithreading
- data sets
- memory requirements
- computing power
- computational power
- memory management
- memory access
- vlsi implementation
- main memory
- level parallelism
- analog vlsi
- memory bandwidth
- chip design
- high bandwidth
- random access
- vlsi design