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A Disturb-Free 10T SRAM Cell with High Read Stability and Write Ability for Ultra-Low Voltage Operations.

Jiubai ZhangYajuan HeXiaoqing WuBo Zhang
Published in: APCCAS (2018)
Keyphrases
  • low voltage
  • random access memory
  • write operations
  • design considerations
  • power line
  • leakage current
  • cmos technology
  • read write
  • high speed
  • low power
  • power management
  • low cost
  • power consumption
  • data access