FDSTDL: Low-power technique for FinFET domino circuits.
Sandeep GargTarun Kumar GuptaPublished in: Int. J. Circuit Theory Appl. (2019)
Keyphrases
- low power
- high speed
- logic circuits
- cmos technology
- power dissipation
- power reduction
- delay insensitive
- power consumption
- vlsi circuits
- low cost
- mixed signal
- single chip
- wireless transmission
- high power
- gate array
- low power consumption
- real time
- digital signal processing
- power saving
- multi channel
- computer simulation
- video sequences
- image processing