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A 1.8-V 700-mb/s/pin 512-mb DDR-II SDRAM with on-die termination and off-chip driver calibration.
Changsik Yoo
Kye-Hyun Kyung
Kyunam Lim
Hi-Choon Lee
Joon-Wan Chai
Nak-Won Heo
Dong-Jin Lee
Chang-Hyun Kim
Published in:
IEEE J. Solid State Circuits (2004)
Keyphrases
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