Pseudo Vector Processor Based on Register-Windowed Superscalar Pipeline.
Kisaburo NakazawaHiroshi NakamuraHiromitsu ImoriShun KawabePublished in: SC (1992)
Keyphrases
- instruction set
- computer architecture
- parallel architecture
- multithreading
- highly parallel
- vector data
- parallel processing
- fourier transform
- feature vectors
- computer systems
- single chip
- high speed
- multiprocessor systems
- genetic algorithm
- floating point
- multi core processors
- level parallelism
- high end
- real time
- vector space
- low cost
- general purpose
- artificial intelligence
- data sets