Very-Low-Voltage testing of amorphous silicon TFT circuits.

Shiue-Tsung Shen Wei-Hsiao Liu Chien-Mo James Li I-Chun Cheng

Published in: ITC (2009)

Keyphrases

low voltage
cmos technology
low power
power dissipation
random access memory
power consumption
parallel processing
design considerations
leakage current
high speed
power line
mixed signal
low cost
image sensor
power management
liquid crystal displays
transmission electron microscopy
e learning