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Run-Time-Conscious Automatic Timing-Driven FPGA Layout Synthesis.
Jason Helge Anderson
Sudip Nag
Kamal Chaudhary
Sandor Kalman
Chari Madabhushi
Paul Cheng
Published in:
FPL (2004)
Keyphrases
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data driven
semi automatic
high speed
signal processing
real time
low cost
texture synthesis
neural network
image processing
search algorithm
evolutionary algorithm
fully automatic
hardware implementation
structural analysis
field programmable gate array