Logic Design of a Fast Circuit for Iterative Additions in Redundant Hybrid.

Giuseppe Alia Enrico Martinelli

Published in: Comput. J. (1998)

Keyphrases

logic synthesis
digital circuits
logic circuits
chip design
circuit design
information systems
hybrid learning
evolvable hardware
neural network
micron cmos
design tools
design considerations
design principles
modal logic
analog circuits
design process
delay insensitive
building blocks