Giuseppe Alia

Publication Activity (10 Years)

Years Active: 1973-2011
Publications (10 Years): 0

Publications

Giuseppe Alia, Enrico Martinelli
A high performance ROM-based structure for modular exponentiation. Comput. Electr. Eng. 37 (3) (2011)
Giuseppe Alia, Enrico Martinelli
NEUROM: a ROM based RNS digital neuron. Neural Networks 18 (2) (2005)
Giuseppe Alia, Enrico Martinelli
Fast modular exponentiation of large numbers with large exponents. J. Syst. Archit. 47 (14-15) (2002)
Giuseppe Alia, Enrico Martinelli
Logic Design of a Fast Circuit for Iterative Additions in Redundant Hybrid. Comput. J. 41 (1) (1998)
Giuseppe Alia, Enrico Martinelli
Sign detection in residue arithmetic units. J. Syst. Archit. 45 (3) (1998)
Giuseppe Alia, Enrico Martinelli
On the Lower Bound to the VLSI Complexity of Number Conversion from Weighted to Residue Representation. IEEE Trans. Computers 42 (8) (1993)
Giuseppe Alia, Enrico Martinelli
A VLSI Modulo m Multiplier. IEEE Trans. Computers 40 (7) (1991)
Giuseppe Alia, Enrico Martinelli
VLSI Binary-Residue Converters for Pipelined Processing. Comput. J. 33 (5) (1990)
Giuseppe Alia, Enrico Martinelli
) operation. J. VLSI Signal Process. 1 (4) (1990)
Giuseppe Alia, Enrico Martinelli, N. Tani
Fast hardware graphic generators of curve families. Comput. Graph. 10 (1) (1986)
Giuseppe Alia, Ferruccio Barsi, Enrico Martinelli, N. Tani
Table Look-up Graphic Interpolation. Eurographics (1985)
Giuseppe Alia, Ferruccio Barsi, Enrico Martinelli
A Fast VLSI Conversion Between Binary and Residue Systems. Inf. Process. Lett. 18 (3) (1984)
Giuseppe Alia, Enrico Martinelli, N. Tani
An Approach to the Design of Hardware Curve Generators for Graphic Displays. Eurographics (1984)
Giuseppe Alia, Ferruccio Barsi, Enrico Martinelli
A fast near optimum VLSI implementation of FFT using residue number systems. Integr. 2 (2) (1984)
Giuseppe Alia
VLSI systolic arrays for band matrix multiplication. Integr. 1 (2-3) (1983)
Giuseppe Alia, Enrico Martinelli
On switching network functionalities and their relationships. Int. J. Parallel Program. 11 (2) (1982)
Giuseppe Alia, P. Ciompi, Enrico Martinelli, F. Bernardini
LSI components modelling in a three-valued functional simulation. DAC (1978)
Giuseppe Alia, Piero Maestrini
An approach to optimal partitioning of hypergraphs. ACM Annual Conference (1) (1974)
Giuseppe Alia, Graziano Frosini, Piero Maestrini
Automated module placement and wire routeing according to a structured biplanar scheme in printed boards. Comput. Aided Des. 5 (3) (1973)