Technology/Memory Co-Design and Co-Optimization Using E-Tree Interconnect.
Zhenlin PeiMahta MayahiniaHsiao-Hsuan LiuMehdi B. TahooriFrancky CatthoorZsolt TokeiChenyun PanPublished in: ACM Great Lakes Symposium on VLSI (2023)
Keyphrases
- optimization algorithm
- optimization process
- optimization problems
- tree structure
- evolutionary algorithm
- high speed
- cost effective
- key technologies
- global optimization
- binary tree
- optimization method
- case study
- tree construction
- random access
- computing power
- memory usage
- data sets
- tree models
- personal computer
- optimization methods
- memory requirements
- main memory
- multi objective
- genetic algorithm