Model checking algorithms for analog verification.
Walter HartongLars HedrichErich BarkePublished in: DAC (2002)
Keyphrases
- model checking
- temporal logic
- formal verification
- model checker
- automated verification
- temporal properties
- deterministic finite automaton
- reachability analysis
- finite state
- concurrent systems
- orders of magnitude
- symbolic model checking
- formal specification
- partial order reduction
- bounded model checking
- verification method
- finite state machines
- pspace complete
- transition systems
- computational complexity
- asynchronous circuits
- process algebra
- timed automata
- epistemic logic
- graph theory
- satisfiability problem
- modal logic
- computation tree logic
- alternating time temporal logic