Instruction-Level DFT for Testing Processor and IP Cores in System-on-a-Chip.

Wei-Cheng Lai Kwang-Ting Cheng

Published in: DAC (2001)

Keyphrases

level parallelism
processor core
instruction set
high speed
single chip
multi core processors
parallel processing
operating system
memory bandwidth
frequency domain
input output
ibm zenterprise
test cases
discrete fourier transform
high density
end to end
chip design
ibm power processor