Variation Resilient Low-Power Circuit Design Methodology using On-Chip Phase Locked Loop.
Kunhyuk KangKeejong KimKaushik RoyPublished in: DAC (2007)
Keyphrases
- low power
- circuit design
- high speed
- power consumption
- low cost
- phase locked loop
- single chip
- low power consumption
- mixed signal
- high power
- digital signal processing
- digital circuits
- wireless transmission
- cmos technology
- vlsi architecture
- vlsi circuits
- logic circuits
- image sensor
- signal processor
- power reduction
- power management
- delay insensitive
- power dissipation
- energy efficiency
- design methodology
- real time