Considerations Of Integrating Computing-In-Memory And Processing-In-Sensor Into Convolutional Neural Network Accelerators For Low-Power Edge Devices.
Kea-Tiong TangWei-Chen WeiZuo-Wei YehTzu-Hsiang HsuYen-Cheng ChiuCheng-Xin XueYu-Chun KuoTai-Hsing WenMon-Shu HoChung-Chuan LoRen-Shuo LiuChih-Cheng HsiehMeng-Fan ChangPublished in: VLSI Circuits (2019)
Keyphrases
- low power
- image sensor
- single chip
- convolutional neural network
- high speed
- low cost
- low power consumption
- power consumption
- direct memory access
- real time
- data acquisition
- cmos image sensor
- power dissipation
- high power
- computational power
- wireless transmission
- vlsi circuits
- processing capabilities
- vlsi architecture
- face detection
- edge detection
- embedded systems
- sensor networks
- neural network
- analog to digital converter
- random access
- cmos technology
- digital signal processing
- associative memory
- mobile devices
- power reduction
- main memory
- gate array
- processing power
- computing systems
- digital camera
- video sequences