A 32 Gb/s Data-Interpolator Receiver With Two-Tap DFE Fabricated With 28-nm CMOS Process.
Yoshiyasu DoiTakayuki ShibasakiTakumi DanjoWin ChaivipasTakushi HashidaHiroki MiyaokaMasanori HoshinoYoichi KoyanagiTakuji YamamotoSanroku TsukamotoHirotaka TamuraPublished in: IEEE J. Solid State Circuits (2013)
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