Efficient on-line interconnect testing in FPGAs with provable detectability for multiple faults.

Vishal Suthar Shantanu Dutt

Published in: DATE (2006)

Keyphrases

multiple faults
high speed
cost effective
neural network
genetic algorithm
low cost
computationally expensive
parallel architectures
expert systems
information systems
high quality
real time
image quality
lightweight
efficient implementation
hardware and software
data sets