A 0.87 V 12.5 Gb/s Clock-Path Feedback Equalization Receiver with Unfixed Tap Weighting Property in 65 nm CMOS.
Daewoong LeeDongil LeeYong-Hun KimLee-Sup KimPublished in: VLSI Circuits (2019)
Keyphrases
- high speed
- power consumption
- cmos technology
- low power
- nm technology
- silicon on insulator
- decision feedback
- low cost
- channel estimation
- circuit design
- multipath
- tf idf
- real time
- user feedback
- power supply
- shortest path
- relevance feedback
- metal oxide semiconductor
- similarity measure
- data acquisition
- path planning
- analog vlsi
- vlsi circuits
- duty cycle
- mobile robot