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A dual-phase-controlled dynamic latched amplifier for high-speed and low-power DRAMs.
Hiroki Fujisawa
Tsugio Takahashi
Masayuki Nakamura
Kazuhiko Kajigaya
Published in:
IEEE J. Solid State Circuits (2001)
Keyphrases
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low power
high speed
high power
power consumption
low cost
single chip
digital signal processing
vlsi circuits
real time
logic circuits
image sensor
power reduction
frame rate
low power consumption
mixed signal
cmos technology
vlsi architecture
wireless transmission
energy dissipation
infrared