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Static Differential NCL Gates: Toward Low Power.
Matheus Trevisan Moreira
Michel Evandro Arendt
Fernando Gehm Moraes
Ney Laert Vilar Calazans
Published in:
IEEE Trans. Circuits Syst. II Express Briefs (2015)
Keyphrases
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low power
logic circuits
low cost
power consumption
high speed
single chip
high power
wireless transmission
low power consumption
digital signal processing
cmos technology
vlsi architecture
gate array
real time
power reduction
parallel processing
signal processor