Design of a Transport Triggered Architecture Processor for Flexible Iterative Turbo Decoder.
Shahriar ShahabuddinJanne JanhunenMarkku J. JunttiPublished in: CoRR (2015)
Keyphrases
- software architecture
- design goals
- conceptual model
- design principles
- highly flexible
- management system
- design process
- design methodology
- single chip
- functional verification
- xilinx virtex
- design considerations
- architectural design
- case study
- industry standard
- design procedure
- memory management
- parallel architecture
- hardware design
- real time
- distributed architecture
- error detection
- memory hierarchy
- hardware implementation