A Hierarchy-Driven FPGA Partitioning Method.

Helena Krupnova Ali Abbara Gabriele Saucier

Published in: DAC (1997)

Keyphrases

high speed
data driven
field programmable gate array
signal processing
hardware implementation
hardware design
real time image processing
real time
pattern recognition
fpga implementation
general purpose
lower level
class hierarchy
hierarchically organized
fpga technology