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A 2.1GHz 6.5mW 64-bit Unified PopCount/BitScan Datapath Unit for 65nm High-Performance Microprocessor Execution Cores.
Rajaraman Ramanarayanan
Sanu Mathew
Vasantha Erraguntla
Ram Krishnamurthy
Shay Gueron
Published in:
VLSI Design (2008)
Keyphrases
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embedded dram
random access memory
power consumption
clock gating
design considerations
dynamic random access memory
cmos technology
low voltage
low power
power management
high speed
energy efficiency
power plant
power supply
memory management
power dissipation
memory access
dual band
main memory