Cache miss reduction through hardware-assisted loop optimization.
Kang ZhaoJinian BianChenqian JiangSheqin DongSatoshi GotoPublished in: CSCWD (2008)
Keyphrases
- hardware and software
- low cost
- memory hierarchy
- optimization algorithm
- global optimization
- embedded processors
- real time
- computing systems
- optimization process
- optimization problems
- data acquisition
- constrained optimization
- hardware architecture
- parallel processing
- personal computer
- back end
- computer systems
- massively parallel
- computing power
- processing units
- high speed