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The Impact of CMOS technology scaling on MOSFETs second breakdown: Evaluation of ESD robustness.

Oleg SemenovHossein SarbishaeiValery AxelradManoj Sachdev
Published in: Microelectron. Reliab. (2004)
Keyphrases
  • low voltage
  • cmos technology
  • low power
  • low cost
  • design considerations
  • power consumption
  • image analysis
  • spl times