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Efficient VLSI Architecture for Decimation-in-Time Fast Fourier Transform of Real-Valued Data.
Pramod Kumar Meher
Basant Kumar Mohanty
Sujit Kumar Patel
Soumya Ganguly
Thambipillai Srikanthan
Published in:
IEEE Trans. Circuits Syst. I Regul. Pap. (2015)
Keyphrases
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vlsi architecture
fast fourier transform
real valued data
image processing
vlsi implementation
frequency domain
fourier transform
low power
hartley transform
neural network
computer vision
multiresolution
real valued
selection algorithm
discrete wavelet transform