On the reuse of existing error tolerance circuitry for low power scan testing.

Anthi Anastasiou Yiorgos Tsiatouhas Angela Arapoyanni

Published in: ISCAS (2015)

Keyphrases

low power
error tolerance
power consumption
low cost
high speed
single chip
image sensor
high power
digital signal processing
vlsi architecture
vlsi circuits
cmos technology
mixed signal
wide dynamic range
pattern recognition
power reduction
low power consumption
logic circuits
signal processing
wavelet transform