Architecture of a Stereo Matching VLSI Processor Based on Hierarchically Parallel Memory Access.
Masanori HariyamaHaruka SasakiMichitaka KameyamaPublished in: IEICE Trans. Inf. Syst. (2005)
Keyphrases
- memory access
- stereo matching
- shared memory
- belief propagation
- message passing
- processing units
- instruction set
- distributed memory
- memory hierarchy
- computation intensive
- memory bandwidth
- data access
- parallel computing
- dynamic programming
- level parallelism
- main memory
- memory management
- depth map
- parallel algorithm
- post processing
- computer architecture
- parallel processing
- access patterns
- cache misses
- external memory
- image matching
- high volume
- parallel computation
- signal processing
- general purpose
- management system
- multiprocessor systems
- graphical models
- data management
- massively parallel
- parallel implementation
- computing systems
- multi view
- operating system
- image processing