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A 9-bit 500-MS/s 2-bit/cycle SAR ADC With Error-Tolerant Interpolation Technique.
Jaegeun Song
Yunsoo Park
Chaegang Lim
Yohan Choi
Soonsung Ahn
Sooho Park
Chulwoo Kim
Published in:
IEEE J. Solid State Circuits (2022)
Keyphrases
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error tolerant
machine learning
data mining
pairwise
keypoints
application domains
graph matching
subgraph isomorphism