Iterative remapping for logic circuits.

Luca Benini Patrick Vuillod Giovanni De Micheli

Published in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (1998)

Keyphrases

logic circuits
low power
tunnel diode
functional decomposition
power consumption
gate array
low cost
logic synthesis
real time
high speed
case study
image segmentation
pattern recognition