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Low-power adiabatic SRAM.

Hides Jamima Yasuhiro Takahashi Toshikazu Sekine

Published in: ISPACS (2011)

Keyphrases

low power
power consumption
low cost
high speed
single chip
vlsi circuits
power reduction
high power
digital signal processing
low power consumption
logic circuits
wireless transmission
vlsi architecture
power saving
cmos technology
energy saving
signal processor
gate array