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Ultra low-power array processor propagation circuit arrangement.

Ari Paasio
Published in: ISCAS (2016)
Keyphrases
  • array processor
  • ultra low power
  • semantic network
  • scan line
  • low power
  • mesh connected
  • high speed
  • cmos technology
  • dynamic programming
  • machine learning
  • reinforcement learning
  • domain specific
  • power dissipation