Electrical modelling of lossy on-chip multilevel interconnecting lines.

K. Z. Dimopoulos John N. Avaritsiotis S. J. White

Published in: EURO-DAC (1991)

Keyphrases

low cost
data compression
high speed
single chip
hough transform
line segments
printed circuit boards
straight line
vlsi implementation
transmission line
line drawings
neural network
chip design
analog vlsi
high density
circuit design
physical design
cmos technology
parallel processing
real time
electrical power