Login / Signup
Mitigation of the impact of across chip systematic process variation using a novel system level design.
Nabanita Ghoshal
Sree Rama K. C. Saraswatula
Santosh Yachareni
Shidong Zhou
Anil Kumar Kandala
Narendra Kumar Pulipati
Published in:
DFT (2021)
Keyphrases
</>
design process
higher level
circuit design
neural network
case study
conceptual model
chip design
vlsi implementation
single chip
design processes
functional verification
data sets
analog vlsi
design methodology
engineering design
design principles
software architecture