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VLSI design and implementation of a reconfigurable hardware-friendly Polar encoder architecture for emerging high-speed 5G system.
Xin-Yu Shih
Po-Chun Huang
Hong-Ru Chou
Published in:
Integr. (2018)
Keyphrases
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reconfigurable hardware
vlsi design
low cost
hardware software
high speed
design methodology
hardware implementation
field programmable gate array
hardware and software
image processing
functional units
evolvable hardware
real time
fine grain
hardware architecture
multi core processors
parallel computing