A 6-bit, 1-GS/s, 9.9-mW, Interpolated Subranging ADC in 65-nm CMOS.
Takumi DanjoMasato YoshiokaMasayuki IsogaiMasanori HoshinoSanroku TsukamotoPublished in: IEEE J. Solid State Circuits (2014)
Keyphrases
- analog to digital converter
- power consumption
- nm technology
- low power
- cmos technology
- power supply
- mixed signal
- hd video
- image sensor
- cmos image sensor
- power management
- silicon on insulator
- power dissipation
- metal oxide semiconductor
- random access memory
- multi channel
- power plant
- vlsi circuits
- analog vlsi
- input image
- wind turbine
- interpolation method