A High Speed License Plate Recognition System on an FPGA.

Takamasa Kanamori Hideharu Amano Masatoshi Arai Daisuke Konno Tomomichi Nanba Yoshiaki Ajioka

Published in: FPL (2007)

Keyphrases

high speed
low power
frame rate
license plate recognition
real time
data acquisition
license plate
high speed networks
database
low power consumption
social networks
gate array