Logic Restructuring for Delay Balancing in Wave-Pipelined Circuits: An Integer Programming Approach.
Srivastav SethupathyNohpill ParkMarcin PaprzyckiPublished in: SYNASC (2005)
Keyphrases
- integer programming
- logic synthesis
- delay insensitive
- digital circuits
- asynchronous circuits
- logic circuits
- constraint programming
- np hard
- power dissipation
- lagrangian relaxation
- chip design
- network flow
- ai planning
- column generation
- linear programming
- cutting plane
- data flow
- production planning
- valid inequalities
- facility location
- floating gate
- random access memory
- integer programming formulations
- cutting plane algorithm
- built in self test
- set covering problem
- set covering
- flip flops
- dantzig wolfe decomposition
- low power
- multi valued
- transportation problem
- set partitioning
- vehicle routing problem with time windows
- reinforcement learning
- branch and bound algorithm
- power consumption
- heuristic search
- objective function