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Polynomial Complexity Asynchronous Control Circuit Synthesis of Concurrent Specifications Based on Burst-Mode FSM Decomposition.
Pavlos M. Mattheakis
Christos P. Sotiriou
Published in:
VLSI Design (2013)
Keyphrases
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high level synthesis
finite state machines
polynomial hierarchy
high level
worst case
data sets
delay insensitive
exponential size
neural network
computational complexity
multiresolution
control system
data acquisition
asynchronous circuits
vapnik chervonenkis dimension