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34.1Gbps Low Jitter, Low BER High-Speed Parallel CMOS Interface for Interconnections in High-Speed Memory Test System.
Daisuke Watanabe
Masakatsu Suda
Toshiyuki Okayasu
Published in:
ITC (2004)
Keyphrases
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high speed
low power
gigabit ethernet
real time
frame rate
video sequences
user interface
low cost
edge detection
error rate