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Defect-Oriented Test- and Layout-Generation for Standard-Cell ASIC Designs.

Joachim SudbrockJaan RaikRaimund UbarWieslaw KuzmiczWitold A. Pleskacz
Published in: DSD (2005)
Keyphrases
  • signal processing
  • hardware implementation
  • computer vision
  • integrated circuit
  • application specific
  • data sets
  • databases
  • circuit design
  • inter cell