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A 4GS/s 8-bit time-interleaved SAR ADC with an energy-efficient architecture in 130 nm CMOS.

Fredy SolisÁlvaro Fernandez BoccoAgustin C. GalettoLeandro PassettiMario R. HuedaBenjamin T. Reyes
Published in: Int. J. Circuit Theory Appl. (2021)
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